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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Instruction Details<br />

A8.6.344 VORN (immediate)<br />

VORN (immediate) is a pseudo-instruction, equivalent to a VORR (immediate) instruction with the immediate<br />

value bitwise inverted. For details see VORR (immediate) on page A8-678.<br />

A8.6.345 VORN (register)<br />

This instruction performs a bitwise OR NOT operation between two registers, <strong>and</strong> places the result in the<br />

destination register. The oper<strong>and</strong> <strong>and</strong> result registers can be quadword or doubleword. They must all be the<br />

same size.<br />

Encoding T1 / A1 Advanced SIMD<br />

VORN , , <br />

VORN , , <br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 1 1 0 1 1 1 1 0 D 1 1 Vn Vd 0 0 0 1 N Q M 1 Vm<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 1 1 1 0 0 1 0 0 D 1 1 Vn Vd 0 0 0 1 N Q M 1 Vm<br />

if Q == ‘1’ && (Vd == ‘1’ || Vn == ‘1’ || Vm == ‘1’) then UNDEFINED;<br />

d = UInt(D:Vd); n = UInt(N:Vn); m = UInt(M:Vm); regs = if Q == ‘0’ then 1 else 2;<br />

A8-676 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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