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Demand test descriptions and error codes - Avaya Support

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Maintenance <strong>Dem<strong>and</strong></strong> Tests<br />

Table 347: TDM Bus Clock Slip Inquiry Test (#149) 2 of 2<br />

Error<br />

Code<br />

Test<br />

Result<br />

Description / Recommendation<br />

Any FAIL The Error Code represents the number of timing slips detected on the<br />

incoming synchronization source since the last slip inquiry was sent to the<br />

Tone-Clock circuit. The incoming synchronization signal can be from one<br />

of the following sources:<br />

1. A DS1 Interface circuit pack, if DS1 Synchronization is administered,<br />

<strong>and</strong> associated with the circuit pack <strong>test</strong>ed<br />

2. S8700-series Fiber-PNC: A Stratum-3 clock, if that option is<br />

administered <strong>and</strong> the circuit pack <strong>test</strong>ed was the active Tone-Clock in<br />

the PN 1.<br />

3. S8700-series Fiber-PNC: The local oscillator on the master IPSI’s<br />

Tone-Clock circuit or on the master Tone-Clock circuit pack, if it is<br />

providing the PN’s clocking signals<br />

4. S8700-series IP-PNC: The local oscillator on the IPSI’s Tone-Clock<br />

circuit providing the media gateway’s clocking signals<br />

5. S8700-series Fiber-PNC: An EXP-INTF circuit pack, if the PN on which<br />

the <strong>test</strong> was executed does not contain the system’s current<br />

synchronization reference<br />

The Error Code is a value between 1 <strong>and</strong> 255.<br />

1. Small numbers of slips should not result in service degradation. If the<br />

Error Code is small (1 or 2), rerun the <strong>test</strong>. If the <strong>error</strong> only occurs<br />

infrequently, it may be ignored.<br />

2. Otherwise, see Synchronization Troubleshooting in SYNC (Port<br />

Network Synchronization).<br />

PASS The IPSI or Processor/Tone-Clock circuit pack does not detect any timing<br />

slips. This indicates that the incoming synchronization timing source is valid<br />

or that the system’s synchronization reference is an IPSI or Processor/<br />

Tone-Clock circuit pack. Enter status synchronization to verify that<br />

the desired synchronization reference is providing timing for the system.<br />

TDM Bus Clock PPM Inquiry Test (#150)<br />

This <strong>test</strong> evaluates the quality of the synchronization source for the Tone-Clock circuit.<br />

1262 Maintenance Alarms for Communication Manager, Media Gateways <strong>and</strong> Servers<br />

2 of 2

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