Demand test descriptions and error codes - Avaya Support

IP-SVR (IP Server Interface)
The TN2312 IPSI is inserted into the PN’s Tone-Clock slot and provides interface back to the
servers via the Ethernet. The IPSI circuit-pack provides the following functions:
● PKT-INT packet bus interface
● Archangel TDM-bus interface
● Tone-Clock functionality (equivalent to TN2182C Tone-Clock circuit pack)
● Ethernet interface for connectivity to the servers
● Ethernet interface for connectivity to Services’ laptop PCs
● Maintenance-board interface for communication with the PN’s TN775 Maintenance board
(TN2312AP)
● Environmental maintenance (TN2312BP)
The processors, and the PKT-INTs reside in different cabinets, connected to each other via the
control networks. All communication between the servers and the IPSIs are done over TCP/IP
Socket connections. Other than the Ethernet that connects the servers to the IPSIs, there are
no other leads for signaling and resets. All communication between the servers and the IPSIs
must be done via messages over the socket connections.
Each IPSI’s state of health (SOH) is kept with the following elements in descending order of
priority:
Table 152: IPSI state-of-health components
Fault Class Circuit pack function that is monitored Priority
Clock Clocking signal for the TDM bus 1 (highest)
PKTINT Sending and receiving packet control messages 2
EAL Noting the state of the expansion archangel link (up or down) 3
Generation Generating tones 4 (lowest)
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